Generally, a cluster computer architecture includes at least one, and typically a plurality of, central processing unit(s) (CPU) and local memory, I/O, etc. resident at each of a plurality of nodes. In one well regarded cluster architecture, physical memory address space is permanently divided into two regions: the lower half is local memory (most significant bit="0"), which is accessible only by the processors in that node, while the upper half (most significant bit="1") defines shared memory, which is physically centralized and accessible by all nodes. There is no hardware support to maintain coherency among copies of shared variables contained in different nodes. Coherency is thus left entirely to software.
The Bull HN Shared Buffer Architecture (SBA) expands upon this architecture by introducing a hardware mechanism that maintains coherency among copies of data that originated in the physically centralized shared memory but are contained in the cache memories of different nodes in the cluster. This improves the performance of the architecture by permitting the different nodes to perform some operations on shared data in parallel and with shorter access times.
A variation of SBA, the Bull HN Distributed Shared Buffer Architecture (DSBA) uses distributed shared memory instead of a centralized shared memory, a configuration which has a number of advantages in terms of performance and availability as well as compatibility with some existing computer products. The address division between private and shared memory remains the same, but the shared memory is replicated at each computer, thus permitting simultaneous read access by all nodes. A hardware coherency mechanism ensures that the data in the shared memories remains coherent.
These variations of the known architecture all employ a rigid partition between private and shared memory. This characteristic makes it difficult, if not impossible, to configure different sizes of private and shared memory to meet the needs of the application mix, both within and among nodes in the cluster. Private memory can never be used for shared applications, and if shared memory is used for private purposes, it is subject to unnecessary coherency traffic and potential integrity problems. The present invention overcomes this restriction.